Publications

(2026). ACAS: Adaptive Control of Inference-Time Activation Sparsity for On-Device LLMs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), To Appear; presented at the 2026 IEEE/ACM International Conference on Co-Design of Embedded Systems (CODES).

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(2026). oFFN: Outlier and Neuron-aware Structured FFN for Fast yet Accurate LLM Inference. ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS).

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(2024). Wear Leveling-Aware Active Battery Cell Balancing. International Conference on VLSI Design and International Conference on Embedded Systems (VLSID).

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(2021). A GPU Architecture Aware Fine-Grain Pruning Technique for Deep Neural Networks. International Conference on Parallel and Distributed Computing (Euro-Par).

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(2021). Optimal Partitioning of Distributed Neural Networks for Various Communication Environments. International Conference on Artificial Intelligence in Information and Communication (ICAIIC).

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(2020). SPARC RTEMS 기반의 NASA cFS 포팅. 한국통신학회 학술대회논문집.

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(2019). Analysis and Optimization of CNN-based Super Resolution with Filter Pruning. International Conference on Information and Communication Technology Convergence (ICTC).

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(2019). Analysis and optimization of CNN-based semantic segmentation of satellite images. International Conference on Information and Communication Technology Convergence (ICTC).

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(2016). A formal approach to power optimization in cpss with delay-workload dependence awareness. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).

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(2015). Modeling and power optimization of cyber-physical systems with energy-workload tradeoff. IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED).

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(2014). Adapnet: Adapting process networks in response to resource variations. International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES).

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(2013). Expandable process networks to efficiently specify and explore task, data, and pipeline parallelism. International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES).

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(2013). Distributed Application Layer: Adaptive Mapping of Multiple Streaming Applications onto On-Chip Many-Core Systems. Nano-Tera. ch Joint Switzerland-Korea Symposium on Novel trends at the frontier of computing and electronics.

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(2012). Power agnostic technique for efficient temperature estimation of multicore embedded systems. International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES).

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(2012). DAL: Programming Efficient and Fault-Tolerant Applications for Many-Core Systems. International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC).

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(2011). Thermal-aware task assignment for real-time applications on multi-core systems. International Symposium on Formal Methods for Components and Objects (FMCO).

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(2011). Worst-case temperature analysis for different resource availabilities: a case study. International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS).

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(2011). Worst-case temperature analysis for real-time systems. Design, Automation & Test in Europe Conference & Exhibition (DATE).

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(2010). An MILP-based performance analysis technique for non-preemptive multitasking MPSoC. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).

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(2009). A timed HW/SW coemulation technique for fast yet accurate system verification. International Symposium on Systems, Architectures, Modeling, and Simulation (SAMOS).

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(2009). Pipelined data parallel task mapping/scheduling technique for MPSoC. Design, Automation & Test in Europe Conference & Exhibition (DATE).

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(2008). 모바일 내장형 시스템을 위한 듀얼-포트 SDRAM 의 성능 평가 및 최적화. 한국정보과학회= Korean Institute of Information Scientists and Engineers, 2008.

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(2007). Performance evaluation and optimization of dual-port SDRAM architecture for mobile embedded systems. International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES).

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(2006). Buffer minimization in RTL synthesis from coarse-grained dataflow specification. Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI).

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